Modeling and Simulation of High Blocking Voltage in 4H Silicon Carbide Bipolar Junction Transistors
Hamid Fardi *
Department of Electrical Engineering, University of Colorado Denver, USA
*Author to whom correspondence should be addressed.
Abstract
For a given breakdown voltage, the drift region thickness and doping concentration of punch-through structure can be optimized to give the lowest specific on-resistance. An optimization scheme performed for a breakdown voltage of 14 kV in 4H-SiC bipolar junction transistor (BJT) at 300 K. The optimum drift region thickness and doping concentration for a 4H-SiC punch-through structure at different breakdown voltages are presented. The optimum drift region thickness and doping concentration are 114 μm and , respectively, which results in the lowest specific on-resistance of 117 mΩcm2. The specific on-resistance is compared with the theoretical specific on-resistance of non punch-through structure. It is shown that the optimized punch-through structure not only has a thinner drift region, but also has a slightly lower specific on-resistance than non punch-through structure. The model is applied and compared to a measured 4H-SiC bipolar transistors with high blocking voltage and results are discussed. The experimental 4H-SiC BJT is able to block 1631 V at 300 K and 2033 V at 523 K, respectively and when the base is open. The simulated blocking voltage when base is open is slightly lower (1600 V at 300 K) than the experimental value due to the current-amplifying properties of the common-emitter BJT.
Keywords: Device modeling, silicon carbide, bipolar junction transistors